In the previous post we concentrated on the major advantage of Flip-Flop over Latches. In this Blog we will be concentrating more on the most basic type of Flip-Flops which is SR Flip-Flop. Do note that there are counterparts for every Flip-Flop in latch as well.
As we all know the major types of Flip-FLop include
Types of Flip-Flop:
The major types of Flip-Flop are
- SR Flip-Flop
- D- Flip-Flop
- JK Flip-Flop
- T Flip-Flop
This is the most basic of all the types of Flip-Flop. It is also known as Set – Reset Flip Flop. It has two excitation states. One state is the set state and the other is Reset state. In the set state the output of the Flip-Flop is high. In reset state the output is Low.
The state diagram of an SR Flip-Flop is just a toggle between two states.The common states can be explained in the following points
- When the Set is high the output is High irrespective of the previous input
- When Reset is high the output is Low irrespective of the previous input
- If the SR Flip-Flop is off (i.e.,) S=0 and R=0 We have no change in the output of the SR Flip-flop.
Knowing the states we can draw the truth table as shown in the table below. The truth table gives us
The excitation states can be clearly seen from the table below. The excitation state gives us the various output possible for an SR Flip-Flop When the past output and the current values of SR is known. When we know the excitation table of an SR Flip-Flop, we can use it to implement other flip flops like D, T and JK.
|0||0||0||0||Flip Flop is OFF|
|1||0||0||1||Flip Flop is OFF|
LIMITATIONS OF SR Flip-Flop:
We find that SR flip flop has one undefined cycle in its operation. This is one of the disadvantages of SR flip flop. Mostly while designing itself this condition is avoided. This defect is rectified in the JK flip-flop.